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[Internship/Stage] HBM & DDR UVM block level environment creation

Stage
Salaire : Non spécifié
Télétravail non autorisé
Expérience : < 6 mois
Éducation : Bac +5 / Master

SiPearl
SiPearl

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Are you ready to embark on an exciting journey in the world of high-performance computing? SiPearl is now offering internship opportunities that will give you hands-on experience in cutting-edge technology.


About the internship:

 

🎯 Missions:

  • You will create from scratch a standalone UVM environment for HBM and DDR to replace or complement our coSimulation platform.
  • The goal is to validate HBM and DDR Tiles standalone with minimum dependencies with FW/Virtual Prototype, create a full feature environment with driver, monitors, sequences and scoreboards, re-usable at RTL Top level to pre-validate the Tiles and their verification corner cases before testing integration to the system.
  • Underlying subject is study of current HBM/DDR Tiles and migration to Rhea2 next version.

 

📍 Location: Maisons-Laffitte, Grenoble, Sophia-Antipolis 

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