Fluent in English to consolidate our growth and be part of the one, the newest and hottest tech adventure in Europe. SiPearl is looking for one CPU Emulation Verification Engineer within the hardware team.

Reporting to the design team manager, you will oversee this:

-          Experienced in Hardware Emulation Platforms and tools such as Veloce

-          RTL development in Verilog, SystemVerilog (DPI transactors and monitors)

-          RTL Simulation (Questasim), Gate-level understanding of RTL and Synthesis

-          Develop verification methodology, ensuring scalable and portable environment across simulation and emulation

-          Programming/Scripting skills: C/C++/SystemC/Perl/Python

-          Creating emulation prototypes from RTL code of the CPU

-          Bring up baremetal software and operating system on emulator-mapped CPU databases

-          Interactive position with System engineering, performance and verification team

You are or you have:

·       At least 4 years of digital HDL design or integration

·       At least 2 years of digital design verification using SystemVerilog

·       Senior experience of coverage-based verification and use of verification IP’s.

·       Experience of using verification management tools.

·       Experience of using external verification resources.

·       (Preferred) Experience of team building

·       (Optional) Experience of AMBA and Arm IP designs

Profile:

·       Someone adaptable

·       Autonomous

·       Excellent oral and writing English communication.

You are motivated by an experience within an industrial startup with fast growth and high visibility, having access to top notch silicon technology (beyond 7nm), all under a very competitive international environment.

After considering your application :

• First call with HR team

• 2 technical interviews

• Personality tests and references check during the process